ALTPLL - BANDWIDTH OPTION ?

Thank you for your question.

The ALTPLL Bandwidth - Preset setting controls the PLL loop bandwidth. In practice, this is a tradeoff between filtering input-clock jitter and achieving faster lock time. In your case, the improvement after changing from "Auto" to "Low" suggests that input clock jitter or noise may be a factor, because the Low setting filters more reference-clock jitter. Based on this, personally I would keep "Low" setting unless you have a specific reason to prioritize faster lock time. I would not expect "Medium" settings to be better by default, because it provides less jitter filtering than "Low". You may check this and confirm back if possible.

You can also check the reference clock quality and board-level jitter/noise.

Reference:

1. https://resources.altera.com/quartushelp/current/index.htm#logicops/logicops/def_pll_bandwidth.htm