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Mikexx's avatar
Mikexx
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

ALTIOBUF - Enable input buffer dyamic delay chain

I get a series of errors when this feature is ticked in the ALTIOBUF: Cyclone V Quartus 20.1 Error (129036): Output port DATAOUT on atom "DQS_Diff_4:u_DQS_Diff_4|DQS_Diff_4_iobuf_bidir_3qg1:DQS_Di...
Generic Io
EthanLi's avatar
EthanLi
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Hi,


I think if you merge it to the whole design, there will be no compile error even it is not fed to DDR.

Have you tried the merged design ever?


Thanks,

Ethan


  • Mikexx's avatar
    Mikexx
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    Sorry for the long delay and many thanks for the design.

    I think the best thing to do here is upload the IOE structure and explain I am trying to adjust the following delays:

    D1

    D3_0

    D3_1

    D4

    It's not obvious or intuitive how this is accomplished with the io_config_**** signals in the ALTIOBUF primitive.

    Are there any examples?