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MM-ATH's avatar
MM-ATH
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

AGILEX5 - HPS-first - timeout waiting for RECONFIG_COMPLETED

Hello, I am using HPS-first boot scheme on AGILEX5 AXE5-Eagle dev board. I have suddenly problem with writing FPGA (fpga_core.rbf) from running linux. Before it worked as expected, but now I am gett...
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tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi


Sorry for the late reponse.

Jeetesh is OOO and I will be helping out with the case.


Could you try the overlay file changes below:


/dts-v1/;

/plugin/;

/ {

fragment@0 {

target-path = "/soc/base_fpga_region";

#address-cells = <2>;

#size-cells = <2>;

__overlay__ {

#address-cells = <2>;

#size-cells = <2>;


firmware-name = "fpga_core.rbf";

config-complete-timeout-us = <30000000>;

};


Regards

Jingyang, Teh

};

};