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Serge93's avatar
Serge93
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9 months ago

AGILEX 7-I R-Tile PCIe Root port : Unsupported Request received after enumeration

hello, I am using the the Agilex 7-I r-tile Dev kit board in PCIe Root Port. After I have done my enumaration when I am doing a Memory Read of one 32-Bits data, I receive a completion with 'Unsuppo...
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RongY_altera's avatar
RongY_altera
Icon for Contributor rankContributor
8 months ago

It looks a mem bar is enabled for use. Somehow the config addr 0x20-27 data does not look right. Normally in a cpu-based test, a mem wr always has a requester id in hdr.


If possible, my suggestion is to set a fpga pcie endpoint design, check the root port parameters from lspci. You may confirm the address base and limit for the device is correct before using it.


Regards,

Rong


Serge93's avatar
Serge93
Icon for Occasional Contributor rankOccasional Contributor
8 months ago

Hello Rong,

The requester ID is fixed in hardware by the R-Tile PCIe IP, you cannot modify it.

I have configured the Memory Base and Limit but not the prefectchabel one.

Knowing I do not want Prefetch access...

Sorry I cannot do your suggestion.

Thank you.
Serge