Forum Discussion
Agilex 7 F/I Series True Differential Input Termination
- 6 months ago
Hi Steve,
reviewing documents and reference design, I agree that GPIO manual, datasheet and development kit schematic are inconsistent in several regards. Looking also at IBIS file, there seems to be a non-linear pull-up feature for TDS input standard which effectively pulls Vicm to about half supply with applied signal. Not sure if IBIS input characteristic is real or roughly simplified.
So all-in-all, it seems like development kit implementation is a possible minimal effort termination option.Regards
Frank
Hi,
don't agree with your conclusions. There are no indications of internal bias circuit. Datasheet just specifies required voltage levels without mentioning how they are achieved. It's identical to other parts specification that surely miss internal bias. Didn't yet check mentioned dev kit schematic.
Ok thanks, I agree datasheet doesn't indicate internal bias. I was basing my comments about internal bias based on the IBIS model seeming to have an internal Bias when the tds12_inp input buffer model is used for the Agilex. But that may just be a difference between what can be inferred from the model and what is the case in reality. I appreciate your response.