Agilex-5: WCK to CK Ratio for LPDDR5

In general, LPDDR5 memory devices support two ratios for the WCK to CK clocks: 4:1 and 2:1. The Micron datasheets refer to this ratio as 'CKR'. From the perspective of the memory datasheet, there is apparent freedom to select one ratio or the other, although there is a requirement to be in 2:1 mode during the 'WCK2CK Leveling Procedure'. The ratio can be changed on the fly.

The Altera EMIF seems to be enforcing a 2:1 ratio, and it seems like there is no option to select a 4:1 ratio. Do you know if the CKR can be changed in the EMIF configuration, or is this hard-coded to be 2:1?