Nicole04
Occasional Contributor
1 year agoAgilex 5 Unused HSIO Banks
Good day,
I would like to confirm that the following statement in Table 13 of the Pin Connection Guidelines: Agilex 5 FPGAs and SoCs document refers to individual banks from the HSIO group:
Connect unused I/O bank power to GND and I/O pins floating if the I/O bank will not be used in future. Do not leave the VCCIO_PIO floating.
Does this mean if I only use HSIO bank 3A and HSIO bank 2A, I should ground the VCCIO_PIO pins of HSIO banks 2B and 3B?
Kind regards,
Nicole