Forum Discussion

Ariel50's avatar
Ariel50
Icon for New Contributor rankNew Contributor
7 days ago

Agilex 5 Power

 

Hello, I am using two A5EC043BB32AI4S devices and I am now planning their power rails. I have two questions.

  1. Is it possible to design one power supply (one regulator) per rail for both FPGASs
  2. There is a requirement in the PCB Design Guideline  User Guide for ‘Recommended VR Accuracy (% of Vnom)’ of ±0.5%.
    What is the meaning of this requirement?
    As I understand it, this refers to the Voltage accuracy (excluding line regulation and load regulation).
    This is a very strict requirement, and most power regulators cannot meet it.
    What is the practical meaning or impact of not meeting this requirement?

    In the datasheet, however, only a maximum value is specified, and it is usually around 3%.

    P.S:the requirement  of the  ±0.5%.are in  table 24 in PCB Design Guidelines (HSSI, EMIF,MIPI, True Differential, PDN) User Guide
Power

1 Reply

  • Farabi's avatar
    Farabi
    Icon for Regular Contributor rankRegular Contributor
    1 hour ago

    Hello, 

     

    1- Is it possible to design one power supply (one regulator) per rail for both FPGASs

    <ANS> Not recommended. The power is very critical for each devices. Might have insufficient power issue. 

     

    2- There is a requirement in the PCB Design Guideline  User Guide for ‘Recommended VR Accuracy (% of Vnom)’ of ±0.5%.
    What is the meaning of this requirement?
    As I understand it, this refers to the Voltage accuracy (excluding line regulation and load regulation).
    This is a very strict requirement, and most power regulators cannot meet it.
    What is the practical meaning or impact of not meeting this requirement?In the datasheet, however, only a maximum value is specified, and it is usually around 3%.

    P.S:the requirement  of the  ±0.5%.are in  table 24 in PCB Design Guidelines (HSSI, EMIF,MIPI, True Differential, PDN) User Guide

    <ANS> The requirement is the VR output voltage swing must not exceed 0.5% for critical power rails. (not all power rails have this requirement). 

    Critical power rails commonly monitored by POR(Power On Reset) circuitry. 

     

    regards,
    Farabi