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Altera_Forum
Honored Contributor
18 years agoaddress decoding in vhdl
hello,
I have a soft-core processor and an uart. in order to send the data from output of the processor to the input of uart vhdl module, i'm thinking that i need address decoding to writes the data into uart?? am i right?? but to do the address decoding in vhdl, i dont have any idea how to write it..can someone guide me on how to do this ?? Thx very much regard, bruno18 Replies
- Altera_Forum
Honored Contributor
--- Quote Start --- that means, if i only use the 8 least significants bit, will i have the same output data as before?? --- Quote End --- Yes I believe so, though you must check this out. - Altera_Forum
Honored Contributor
that means, if i only use the 8 least significants bit, will i have the same output data as before??
- Altera_Forum
Honored Contributor
--- Quote Start --- hello vizzie, i just realized that rs232 cant handle 31 bits. mem_write is 32 bits width. that means what comes out of my address decoder is also 32 bits width. tx_data_in must not be more than 8 bits..do you have any idea on this? --- Quote End --- I suppose you mean you have 32 bits data bus from the processor and the device data width is only 8-bits (right?). If there are no specific bus-arbitration rules in zpu (which appears to be true), then what abt connecting the least significant 8-bits of data-bus to tx_data_in? - Altera_Forum
Honored Contributor
hello vizzie,
i just realized that rs232 cant handle 31 bits. mem_write is 32 bits width. that means what comes out of my address decoder is also 32 bits width. tx_data_in must not be more than 8 bits..do you have any idea on this? - Altera_Forum
Honored Contributor
--- Quote Start --- there is blockram instantiated in my zpu_core.vhd. does this decoder take out one by one the data in the blockram(in attachment)?? --- Quote End --- I can't say. You will have to simulate the design and verify. The decoder is meant to decode the addresses of the processor not that of a memory. A good reading of processor basics should clear your doubts: http://en.wikipedia.org/wiki/microprocessor --- Quote Start --- can you give me examples of chip_select?? --- Quote End --- Some good examples can be the select lines of a mux, enable lines of a counter and CS signals of external memories. --- Quote Start --- out_mem_addr(14 downto 0)="00000000000000", then chip_select='1'?? am i right?? thx --- Quote End --- No. The address should be that of a processor. - Altera_Forum
Honored Contributor
there is blockram instantiated in my zpu_core.vhd. does this decoder take out one by one the data in the blockram(in attachment)?? can you give me examples of chip_select?? out_mem_addr(14 downto 0)="00000000000000", then
chip_select='1'?? am i right?? thx - Altera_Forum
Honored Contributor
--- Quote Start --- where should i define my uart address?? in my uart_serial.vhd?? --- Quote End --- You don't need to define uart_address. A uart doesn't need an address, right? The addresses are from the processor. A peripheral to a processor needs an address. So we have double whammy here :). Question: There are address lines coming from a processor but our peripheral/device has no port which looks like an address line. What do we do? Answer: Use some enable signal like chip_select or tx_enable which kicks off the peripheral to work as an equivalent to an address line. - Altera_Forum
Honored Contributor
where should i define my uart address?? in my uart_serial.vhd??
- Altera_Forum
Honored Contributor
--- Quote Start --- hello vizzie, see my attachments(uart and zpu in vhdl and bdf files). thx regards, bruno --- Quote End --- I saw your files and have following suggestions: 1.Write logic to decode the out_mem_addr, out_mem_writeEnable and out_mem_readEnable to control tx_data_en, rx_data_en and rest of the uart. For example: ================== if out_mem_addr = "uart_address" then --where uart-address is pre-defined if out_mem_writeEnable = '1' then tx_data_en <= '1'; tx_data_in <= relavant data; else tx_data_en <= '0'; tx_data_in <= (others => '0'); end if; --Similarly decode out_mem_readEnable with rx_data_en and rx_data_out etc. else --do nothing or reset the uart. end if; =================== 2. This would be one way to decode the address of uart. - Altera_Forum
Honored Contributor
--- Quote Start --- hello, in my attachment is my zpu_core(my processor) and a uart. mem_write is data output from my processor.it has 32 bits width.how to write an address decoder between zpu_core and uart serial?? i'm still thinking about it...any starting idea would be greatly appreciated.. Thx --- Quote End --- I saw your attachment. However all the signals for the uart can not be seen in the snapshot (please post it again). A rough idea is as follows: 1. You need to decode the address to select the uart component. This means when the address lines of the processor are loaded with values pertaining to the address space of the uart, there has to be some means to start the uart operation. 2. I don't see any address lines in the uart component. Does it have a select/enable component? In that case when the uart address is loaded on the zpu address bus, the select/enable lines should go high for the uart. You need to write an if-else type of construct for this. This is what we would call address decoding in this case.