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Altera_Forum
Honored Contributor
18 years agoaddress decoding in vhdl
hello, I have a soft-core processor and an uart. in order to send the data from output of the processor to the input of uart vhdl module, i'm thinking that i need address decoding to writes the...
Altera_Forum
Honored Contributor
18 years ago --- Quote Start --- hello vizzie, see my attachments(uart and zpu in vhdl and bdf files). thx regards, bruno --- Quote End --- I saw your files and have following suggestions: 1.Write logic to decode the out_mem_addr, out_mem_writeEnable and out_mem_readEnable to control tx_data_en, rx_data_en and rest of the uart. For example: ================== if out_mem_addr = "uart_address" then --where uart-address is pre-defined if out_mem_writeEnable = '1' then tx_data_en <= '1'; tx_data_in <= relavant data; else tx_data_en <= '0'; tx_data_in <= (others => '0'); end if; --Similarly decode out_mem_readEnable with rx_data_en and rx_data_out etc. else --do nothing or reset the uart. end if; =================== 2. This would be one way to decode the address of uart.