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I have two problems with this construct
- it doesn't refer to a defined VHDL syntax as far as I'm aware of
- it leaves sum unconnected in Quartus V9.0, without generating an error
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I verified it in 12.0 in the RTL-viewer. Both constructs generated the same 'schematic'. I almost sure it will also work in 9.1 as I have used similar constructs in 9.1-based projects.
I have never looked at the offical VHDL specification and I am not a language expert but let's elaborate:
if we write
sum <= n1 + n2 ;
we conclude that the sum of the two unsigned vectors is assigned to an unsigned vector. The VHDL compiler knows how to do this. Internally the compiler may represent the result of 'n1 + n2' in any format it thinks suited, but it will convert it into the unsigned representation of the LHS.
Now consider a function
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func( par : xxx) return unsigned ...
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we can do the following:
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sum <= func( n1 + n2 )
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assuming
func handles the type of 'n1 + n2'.
A function returns an (RHS) object of the specified type and as such we can write the following:
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sum <= func(n1 + n2)(7 downto 4) ;
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A typecast is a kind of special function, so we can replace the function
func() with the typecast
unsigned() resulting in
sum <= unsigned(n1 + n2)(7 downto 4) ;
So we can save some typing and can do with less 'intermediate' signals cluttering up the file.
It also works with the dot-operator for functions returning a record type.
You may have to enable VHDL 2008 support, I always do ...
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