Altera_Forum
Honored Contributor
Honored ContributorAccessing HPS Pins
Hello, I know I can route HPS pins to the FPGA side but is it possible to do the opposite, route FPGA side logic to HPS part pins? Thank you
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Altera_ForumHonored Contributor
Honored ContributorSo, I've tried to share the HPS MAC Pins with my FPGA, So I can use the TSE MAC instead of the MAC inside the HPS.
Everything seems ok but I am getting this: Error (15874): Output port DATAOUT of DDIO_OUT primitive "cpusoc_cpu:u0|cpusoc_cpu_tse_mac_1:tse_mac_1|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_out4:the_rgmii_out4|altddio_out:altddio_out_component|ddio_out_jhb:auto_generated|ddio_outa[0]" must drive input port I of I/O OBUF primitive or input port DATAIN of DELAY_CHAIN primitive. Error (15874): Output port DATAOUT of DDIO_OUT primitive "cpusoc_cpu:u0|cpusoc_cpu_tse_mac_1:tse_mac_1|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_out4:the_rgmii_out4|altddio_out:altddio_out_component|ddio_out_jhb:auto_generated|ddio_outa[1]" must drive input port I of I/O OBUF primitive or input port DATAIN of DELAY_CHAIN primitive. Error (15874): Output port DATAOUT of DDIO_OUT primitive "cpusoc_cpu:u0|cpusoc_cpu_tse_mac_1:tse_mac_1|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_out4:the_rgmii_out4|altddio_out:altddio_out_component|ddio_out_jhb:auto_generated|ddio_outa[2]" must drive input port I of I/O OBUF primitive or input port DATAIN of DELAY_CHAIN primitive. Error (15874): Output port DATAOUT of DDIO_OUT primitive "cpusoc_cpu:u0|cpusoc_cpu_tse_mac_1:tse_mac_1|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_out4:the_rgmii_out4|altddio_out:altddio_out_component|ddio_out_jhb:auto_generated|ddio_outa[3]" must drive input port I of I/O OBUF primitive or input port DATAIN of DELAY_CHAIN primitive. Error (15874): Output port DATAOUT of DDIO_OUT primitive "cpusoc_cpu:u0|cpusoc_cpu_tse_mac_1:tse_mac_1|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_out1:the_rgmii_out1|altddio_out:altddio_out_component|ddio_out_ghb:auto_generated|ddio_outa[0]" must drive input port I of I/O OBUF primitive or input port DATAIN of DELAY_CHAIN primitive. Error (15871): Input port DATAIN of DDIO_IN primitive "cpusoc_cpu:u0|cpusoc_cpu_tse_mac_1:tse_mac_1|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_in4:the_rgmii_in4|altddio_in:altddio_in_component|ddio_in_jsd:auto_generated|ddio_ina[3]" must come from an I/O IBUF or DELAY_CHAIN primitive Error (15871): Input port DATAIN of DDIO_IN primitive "cpusoc_cpu:u0|cpusoc_cpu_tse_mac_1:tse_mac_1|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_in4:the_rgmii_in4|altddio_in:altddio_in_component|ddio_in_jsd:auto_generated|ddio_ina[2]" must come from an I/O IBUF or DELAY_CHAIN primitive Error (15871): Input port DATAIN of DDIO_IN primitive "cpusoc_cpu:u0|cpusoc_cpu_tse_mac_1:tse_mac_1|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_in4:the_rgmii_in4|altddio_in:altddio_in_component|ddio_in_jsd:auto_generated|ddio_ina[1]" must come from an I/O IBUF or DELAY_CHAIN primitive Error (15871): Input port DATAIN of DDIO_IN primitive "cpusoc_cpu:u0|cpusoc_cpu_tse_mac_1:tse_mac_1|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_in4:the_rgmii_in4|altddio_in:altddio_in_component|ddio_in_jsd:auto_generated|ddio_ina[0]" must come from an I/O IBUF or DELAY_CHAIN primitive Error (15871): Input port DATAIN of DDIO_IN primitive "cpusoc_cpu:u0|cpusoc_cpu_tse_mac_1:tse_mac_1|altera_eth_tse_mac:i_tse_mac|altera_tse_rgmii_module:U_RGMII|altera_tse_rgmii_in1:the_rgmii_in1|altddio_in:altddio_in_component|ddio_in_gsd:auto_generated|ddio_ina[0]" must come from an I/O IBUF or DELAY_CHAIN primitive
