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JET60200's avatar
JET60200
Icon for Contributor rankContributor
4 years ago

A10 PCIe HIP "nreset_status" signal tobe deasserted randomly, even though npor&pin_pers remains high

hello expert, We uses Arria10 PCIe HIP core to build a EP device. In general, the FPGA works fine when plugging inside x86 SERVER PCIE Slot at most cases . But for a part of x86 servers, we f...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


Could you share the signaltap with signals below? What is the speed grade and lane number used?


pll_cal_busy

tx_cal_busy[n-1:0]

rx_cal_busy[n-1:0]

pin_perst

npor

reset_status

pld_clk_inuse

pll_locked

rx_is_lockedtoref[n-1:0]

rx_is_lockedtodata[n-1:0]

rx_std_signaldetect[n-1:0]

ltssmstate[4:0]

lane_act[3:0]

currentspeed[1:0]

rx_ready[n-1:0]

tx_ready[n-1:0]

rx_analogreset[n-1:0]

rx_digitalreset[n-1:0]

tx_analogreset[n-1:0]

tx_digitalreset[n-1:0]

tx_st*

rx_st*


Thanks

Best regards,

KhaiY


JET60200's avatar
JET60200
Icon for Contributor rankContributor
4 years ago

Thanks @KhaiChein_Y_Intel for reply,

We checked PCIe HIP part library code, and found below code. To my understanding, this "output reset_status" signal dedrived from "reset_status_hip" signal, while the "reset_status_hip" comes from :

twentynm_hssi_gen3_x8_pcie_hip { .reset_status (reset_status_hip), } ;

My puzzle is : what does this "hssi_gen3_x8_pcie_hip { .reset_status )" stand for ?

At what condition, this "hssi_gen3_x8_pcie_hip { .reset_status )" would be deasserted ?

ThankS a lot !!

[ ==

;; \qpro19_2_ip\board_pcie_a10_hip_0\altera_pcie_a10_hip_191\synth\altpcie_a10_hip_pipen1b.v
wire reset_status_hip;
output reset_status,
twentynm_hssi_gen3_x8_pcie_hip # (
<params ...>
) wys (
...
.reset_status (reset_status_hip), // where does the [ reset_status_hip] come from ??
...
// synthesis translate_on
.wake_oen (wakeoen )
);
altpcie_sc_bitsync_node #(
) reset_status_altpcie_sc_bitsync(
.clk (pld_clk) ,// clock
.rst_n (npor_sync) ,// async reset
.data_in (reset_status_hip) ,// data in
.data_out (reset_status) // data out
);

]