Altera_ForumHonored Contributor16 years agoA problem with using DCFIFO (lpm_fifo) Hello! In my design I have a 8bit x 4 words dual-clock fifo component (LPM_FIFO+) and I observe a very strange behaviour or the wrfull output signal. Since I have fifo 4 word-deep I expect...Show More
Altera_ForumHonored Contributor15 years agoAre you using a Nios CPU in your design? What connections do you have with your PC?
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