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ShivaKi's avatar
ShivaKi
Icon for New Contributor rankNew Contributor
1 year ago

5CEBA7F27C8N_Power Supply Pin connection

Hello,

For 5CEBA7F27C8N FPGA part, required clarification on VREF[#]N0 pins connection.

For example, Bank 6A is operating at 2.5V and we have considered two I/O standards "2.5V LVDS" and "LVPECL" in Bank 6A.

Based on these two I/O standards considered in Bank 6A, do we need connect "VREFB6AN0" pin to VCCIO of 6A bank or can we connect it to ground? Please confirm

Configuration
Generic Io
Power

2 Replies

  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor
    1 year ago

    Hi,
    VREF is only used for voltage referenced I/O-standards, SSTL and HSTL. Neither LVDS nor LVPECL need it. So GND connection of VREF is the standard option.
    Regards
    Frank

  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor
    1 year ago

    Hello,


    May I know if you need any more clarification after answers provided by Frank?


    Regards,

    Aqid