Altera_Forum
Honored Contributor
Honored Contributor500 MHz On-Board Clock Oscillator
Hi everyone, Can anybody help me and introduce a FPGA board with 500 Mhz on-board clock oscillator? appreciate for your help
Forum Discussion
Altera_ForumHonored Contributor
Honored ContributorYou can easily generate an internal clock of up to 472 MHz (the maximum PLL output frequency of Cyclone IV C6 speed grade). To achieve 500 MHz output data rate, you preferably use 250 MHz clock and dual data rate registers.
The 3.3V IO standards available with DE0-nano will hopefully achieve 500 MHz data rate respectively 250 MHz toggle rate.
