Honored Contributor
Honored ContributorI'm pretty sure, that all requested information can be found in the MAX II device handbook and Quartus documentation. Cause the documents are rather extensive, it may be not always easy to find. But it's always useful to read the handbooks thoroughly to my opinion. If you're looking for a particular detail, an Acrobat text search can help.
Open drain outputs can achieve an output voltage above 3.3V VCCIO, e. g. 4.0V, but with slow rising edge only. If your connected 5V peripheral is satified with 3.3V output voltage (e. g. when using HCT logic rather than HC), the regular LVTTL or LVCMOS I/O standard can be used on output from MAX II. On input, the logic level has to be reduced. PCI diodes with a series resistor are one possible option, a two resistor voltage divider is another. PCI diodes can be enabled in Quartus Pin Planner (use the context menu to display the respective columns) or Assignment Editor.
