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Altera_Forum
Honored Contributor
Honored Contributor2's complement consideration
Hello everyone! I have some considerations about the implementation of twos complement in a filter/decimation design. The ADC used in the design is AD7401, which had also been discussed ea...
Altera_ForumHonored Contributor
Honored ContributorYes switch to numeric_std, and use:
- signed signals when information is signed - unsigned signals when information is unsigned - std_logic when information is just a bunch of bits. It makes the code easier to understand.
