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ShivaKi's avatar
ShivaKi
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1 year ago

USB Blaster Download cable_Timing Specification

Hello, For USB Blaster UG-USB81204 is considered for Debugging Cyclone V (5CEBA7F27C8N) 1. What is the maximum TCK frequency that is supported by USB Blaster UG-USB81204 2. What will be minimum...
Board Debug
Fpga Devkit
FvM's avatar
FvM
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1 year ago
Hi,
there's no official timing specification for USB-Blaster. As far as I remember, maximal TCK speed is 6 MHz with 50 % duty cycle. Setup- and hold times for TMS, TDO and TDI are basically a half clock cycle (about 80 ns). USB-Blaster is using 6 MHz clock during data shift operations, TAP controller is advanced with slower bit banging operations.
ShivaKi's avatar
ShivaKi
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1 year ago

Hello,

Will there be any debugger output delay on TDI and TMS lines from falling edge of TCK?

  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor
    1 year ago

    Hi,
    there's no systematic delay but possible driver delay skew. In (slow) initial setup, TDI and TMS are also driven without TCK edge. Consider that TMS is acting as clock during TAP controller configuration, operated independent of TCK.