TR4 (or DE4) PCIe Image Processing demo (64-bit)

--- Quote Start ---

Has anyone been successful in running the TR4 (or even DE4) PCIe Image Processing demo? I have installed the drivers and used the right DLLs.

The Fundamental demo works fine for me, it detects the FPGA board, controls LEDs, etc.

However for the Image Processing demo, when I upload the image from FPGA to PC, the image appears garbled. It looks like the data isn't aligned in the right order.

I am using Windows 7 64-bit. Does anyone have any luck with this demo?

It's a bit frustrating that the demo didn't work out of the box. I think more testing should have been done.

--- Quote End ---

Send a support request to Terasic directly. I've seen the DE4 demos working, however, have not tested them myself.

Give Terasic a chance to respond to your questions. If you are still having trouble, let me know which design you are trying to test, and I'll try the same test on the DE4-530K board I have.

Cheers,

Dave

Hi Dave,

Thanks for the reply. In fact, I have sent emails to Terasic prior to posting here. Their advice was to download the latest version of the CD, which I have, and the problem persists.

I am trying to test the PCIE0 Image Processing Demo. As mentioned earlier, uploading the image from FPGA to PC gives me a garbled image (image data not aligned properly). Not sure if the problem lies upstream or downstream.

I am using Windows 7 64-bit.

Thanks.

--- Quote Start ---

Thanks for the reply. In fact, I have sent emails to Terasic prior to posting here. Their advice was to download the latest version of the CD, which I have, and the problem persists.

--- Quote End ---

Ok.

--- Quote Start ---

I am trying to test the PCIE0 Image Processing Demo. As mentioned earlier, uploading the image from FPGA to PC gives me a garbled image (image data not aligned properly). Not sure if the problem lies upstream or downstream.

I am using Windows 7 64-bit.

--- Quote End ---

I have a Windows 7 64-bit setup as well.

Walk me through what you do to see this problem, and I'll try it on the board I have. For example

1) Which version of the demo CD?

* I installed DE4_v.1.2.1_SystemCD

2) What is the PCIE0 Image Processing Demo?

* demonstrations\DE4_530\PCIe_ImageProcess?

* or are you using the 230 board?

3) What did you do to try and run the design?

* just follow the instructions in usermanual\DE4 User Manual.pdf?

You can email me directly if you prefer (my forum name is my email address).

Cheers,

Dave

Hi Dave,

Thanks very much. The steps I used are for the TR4 board, but presumably the steps are pretty much the same for DE4.

These are the steps:

1. Install 64-bit PCIe drivers.

2. Download PCIe Image Process bitstream to FPGA using Quartus programmer

3. Restart computer

4. Check that FPGA device appears in Device Manager (appears as "Terasic PCIe FPGA Board" under "Jungo")

5. Run the PCIe Image Process software (the one with the 64 bit dll, TERASIC_PCIEx64.DLL)

6. Select a 320x240x3 JPG image (I also tried BMP)

7. Click "Download Image" (Status appears as "Downloaded successfully")

8. Click "Upload Image" (Status appears "Uploaded successfully", but image is garbled)

Here are screen shots of how the images appear:

http://imgur.com/a/dwxtd

Obviously some sort of communication took place, just not in the right order. I'm not sure if the PCIe is indeed sending data in the wrong order, or if it's just the software that failed at aligning the data properly.

Any help would be very much appreciated.