New Contributor通过仿真S10 PCIEGEN3X16 的example，发现DMA 一共给dma_controller 下发了5个指令，如下图所示：
指令1 ：输出给 Read data mover interface 的 dma_rddm_desc_data端口
指令2： 输出给 Read data mover interface 的 dma_rddm_desc_data端口
指令3： 输出给 Write data mover interface 的 dma_wrdm_prio_data端口
指令4： 输出给 Read data mover interface 的 dma_rddm_prio_data端口
指令5： 输出给 Write data mover interface 的 dma_wrdm_desc_data端口
目前对5个指令的具体所做的操作有疑问。能否对5个指令的意义做一些解释，手册上没有明确的描述，谢谢？
Regular ContributorHi,
I believe this is something related to the Read & write DMA operation, you may refer to the section 7.1.3.1 in the following link.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/avmm_stratix10_hard_ip+_ug.pdf
Regards -SK
Regular ContributorHi,
Since there are no recent activities, I am putting the status of this forum case to close-pending. The status will remain in this state for 20 calendar days. If this does not fully address your question, simply post a note to in this forum and it will be reopened for further investigation.
Regards -SK
