PCIe hard IP simulation on Xcelium

Hi Binu,

I have review the case with our Simulation Expert, unfortunately we do not support "xrun" utility, (though we do have xrun support in our roadmap).
this utility might be causing errors while compiling the libraries.

For now, we do support the multi-step flow where we compile the files first into designated libraries (using xmvlog), elaborate using xmelab and simulate using xmsim.

You can refer to any of our generated Xcelium scripts to see the commands, To generate the simulation scripts in Quartus click Tools -> Generate Simulator Setup Script for IP …
this option will generate several folders, you can open the xcelium folder to see the xcelium_setup.sh
(more info in this section from our documentation 1.5.3.2. Scripting IP Simulation)

here you can see how to use and source the generated script in the link below, in case you decide to use the generated script.
5.2. Sourcing Cadence Xcelium Simulator Setup Scripts

Alternately, you can run quartus eda simulation library compiler to generate xcelium script to compile the libraries.
Example , Here’s the command to generate xcelium script to compile Stratix 10 libraries for verilog:
quartus_sh --simlib_comp -tool xcelium -language verilog -family stratix10 -gen_only -cmd_file cmp.sh
(cmp.sh will contain the commands)

Regards,

Wincent_Intel