New ContributorPCIe Avalon-MM to DDR Write and Read
Hello,
I am looking at methods to write/read from DDR from my host system through the PCIe Hard IP block.
I have looked at some examples for Qsys projects using the PCIe Hard IP block and I understand how the rxm_bar<n> Avalon interfaces are used to access memory mapped regions through PCIe:
I also saw an example of the "External Memory Interface IP" to see how to communicate to DDR and I see the Avalon Slave on the EMIF is used to read/write to DDR:
However, I cannot connect the rxm_bar<n> interface directly to this because the EMIF provides its own clock for the transactions to the EMIF.
I guess I can add a dual port Avalon-MM in between both of these (so the PCIe Hard Macro writes to the Avalon-MM memory and perhaps a DMA reads data from this BRAM and pushes it to the EMIF) but I was not sure if there was a more elegant way of doing this. I think others must have done something similar to this, so I wanted to ask if there was another way.
Thanks!
Prateek
