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prateekmohan's avatar
prateekmohan
Icon for New Contributor rankNew Contributor
4 years ago

PCIe Avalon-MM to DDR Write and Read

Hello, I am looking at methods to write/read from DDR from my host system through the PCIe Hard IP block. I have looked at some examples for Qsys projects using the PCIe Hard IP block and I under...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


Pls see my reply below.


  1. Yes, you need to initiate external memory interface IP to use DDR3 or DDR4
  2. For the different clock frequency connection issue between PCIe Avalon MM Bar and DDR3 Avalon MM interface - I think you can use "Avalon MM clock crossing bridge" IP in platform designer to handle the different clock domain crossing


Thanks.


Regards,

dlim