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zangman's avatar
zangman
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5 years ago
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[Noob DE10-nano] Can I deploy a generic rbf from linux using Cyclone V SoC?

Hi - I'm a hobbyist new to the world of FPGA and especially FPGA SoC. I just got the DE10-Nano Rev C and I've been able to play around with the Linux installation and tried a few of the demo applicat...
  • zangman's avatar
    zangman
    5 years ago

    Okay I think I figured out how to deploy a generic hardware design to the FPGA. It doesn't really need device trees or configuring the Avalon bus, but it does need a specific linux image.

    Here are the steps. First the hardware design:

    1. Create a simple FPGA only design in Quartus Prime. I used Quartus Prime Lite Edition 20.1. Here is my blinking LED:
      module blink (
        input clk,
        output led
      );
      
        reg [27:0] counter;
      
        always @(posedge clk) begin
          counter <= counter + 1'b1;
        end
      
        assign led = counter[26];
      
      endmodule
      ​
    2. Assign the pins using the pin planner. I used `PIN_W15` with 3.3V LVTTL.
    3. Run the Assembler in Quartus. It will generate the sof in the output_files folder.
    4. Convert the sof to rbf using File > Convert Programming File. This will open a new window.
    5. Under 'Programming File Type', select 'Raw Binary (.rbf)'
    6. Under 'Mode', select 'Passive Parallel x16'.
    7. Name the output file `soc_system.rbf`.
    8. In the Input files section, click on SOF Data and click on 'Add File'. Select the sof file. In my case it was at `output_files/blink.sof`.
    9. Click Generate and close the window.

    Here is a screenshot:

    On the software side, to deploy this from the HPS, you need to use the console only version of Linux ("Linux Console (kernel 4.5)"). This can be downloaded from the Terasic website.

    The reason you can't use the LXDE version is because it makes use of the HDMI output which is connected to the FPGA fabric and the hardware design should be able to work with it. It will still flash the rbf, but linux won't boot.

    After writing the console version of the image to the SD card, copy the file soc_system.rbf into the fat partition (where the zImage file is also present).

    Next, set the MSEL bits on the DE10-Nano all to on. This is needed for the "Passive Parallel x16" mode that we used.

    Now when you insert the sd card and power it on, the design gets flashed and the FPGA fabric now implements your design.

    To change the design from Linux, you can scp the new design to the de10-nano, mount the fat partition (which should be /mnt/mmcblk0p1) and replace the soc_system.rbf file there. After that reboot it and it should flash the new design.

    This approach can be followed for more complex designs also which use the Avalon bus to interact between the HPS and the FPGA.