LVDS receiver resistors

Hi Lorenzo,

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I'm currently developing on a DE2-115 together with an HSMC daughter card (TI's ADS58B18EVM through HSMC-ADC-bridge adapter). I need to use LVDS I/O standard for interfacing the cards, so I know I have to install 100-ohm resistors close to the FPGA to get things working.

I've looked on the web for a DE2-115 BOM or layout to find resistors part number or at least physical dimensions, but I couldn't.

Where can I find the informations I need? Anyone can help?

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I just looked for the layout in the DE115 distribution, but they only have the schematic in there. Page 23 shows the termination resistors you need to load on the DE115.

Try and locate R55, R56, etc. The footprints are most likely 0402 (40 mils x 20 mils = 1 mm x 0.5 mm). If the pads on the resistor footprints are about the same distance apart as the BGA balls (or the vias on the bottom of the PCB ), then the resistors are 0402.

If you cannot figure it out, let me know, and I'll look on the board I have at home.

Cheers,

Dave

Hi Dave (don't know if you remember, but you've already helped me once).

I'm currently checking what you said: comparing Cyclone IV BGA with resistors length, it seems like they're 0402. Anyway, I haven't got much experience with this kind of stuff, so I wouldn't put the hand on fire.

If you could check for me I would be very grateful. If you have no time no problem, I'll try with 0402.

Anyway thanks for your still precious help!

Cheers,

Lorenzo

Hi Lorenzo,

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I'm currently checking what you said: comparing Cyclone IV BGA with resistors length, it seems like they're 0402.

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Do you have some 0402 resistors to install?

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If you could check for me I would be very grateful. If you have no time no problem, I'll try with 0402.

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I'll have a look tonight when I go home.

If you want a faster double-check, you could post a photo where you can see the resistors and the BGA balls.

Cheers,

Dave

No, I don't have 0402 resistors, I would order them. I was just trying to make a guess by eye comparing BGA balls distance with resistors footprint on the board, that's why I'm not sure.

Anyway I don't hurry, so if it isn't a problem for you I'll wait for your check.

Thanks again Dave.

Cheers,

Lorenzo

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Anyway I don't hurry, so if it isn't a problem for you I'll wait for your check.

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Ok, I'll look tonight.

Cheers,

Dave

The LVDS termination resistors are located on the top-side of the DE115 PCB between the FPGA and the GPIO/HSMC connectors. They are 0402 packages.

On the board I have, the resistor pads have solder blobs on them. Before you try to solder resistors, remove the blob from one side of the resistor using solder wick. Leave the other blob there, you can use that when tacking the resistors to the board. You can hand-solder the resistors easy enough. Either use head-mounted magnifying glasses or a microscope.

Make sure you have spare resistors, they're pretty hard to find when you drop them :)

Cheers,

Dave

Great! That helps more than I needed. I don't know how I would do without your support! :)

Thank you so much Dave and talk to you soon.

Cheers,

Lorenzo

I'm currently developing on a ArriaII EVM together with an HSMC daughter card (TI's ADS62p29EVM through HSMC-ADC-bridge adapter).（that's very similar to your design） I also need to use DDR LVDS for interfacing the cards.

But I'm a freshman with this interface and are confused about DDR LVDS. I want to see the actual waveform using signaltapII.

I added a DDRIO_in megafunction to interfacing the ADC chip.Pin IN[5:0] and INCLK are from ADS62P29 and SIGNAL_TAP_CLK is used in the signaltap clk.

But it can't compile successfully.I got an fitter error:Folling 6 routing resources needed by more than one signal during the last fitting attempt.The 6 pins are IN[5:0].

Do I miss something like sdc or regenerator the INCLK in the PLL module, I really don't know how to find this informations.

Many thx.

Regards,

Alan

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I added a DDRIO_in megafunction to interfacing the ADC chip.Pin IN[5:0] and INCLK are from ADS62P29 and SIGNAL_TAP_CLK is used in the signaltap clk.

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You cannot probe at the DDR inputs, you need to probe at the DDR block outputs, i.e., the half clock-rate data.

Cheers,

Dave