Forum Discussion
Intel EMIF FPGA IP DTS / DTB error.
Hello,
Need help for this DTS/DTB generation error.
We are using this link as the base design:
https://rocketboards.org/foswiki/Projects/A10AVCVPCIeRootPortWithMSI
Then we added the FPGA DDR4 interface, "emif_0". We are having this DTS/DTB generation errors:
> sopc2dts -v -v --input ghrd_10as066n2.sopcinfo --output ghrd_10as066n2.dts --board hps_a10_common_board_info.xml --board ghrd_10as066n2_board_info.xml --bridge-removal all --clocks
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
> dtc -I dts -O dtb -o ghrd_10as066n2.dtb ghrd_10as066n2.dts
ERROR (phandle_references): Reference to non-existent node or label "emif_0_arch"
ERROR: Input tree has errors, aborting (use -f to force output)
Internet search showed instructions for custom IP, but error is from Intel EMIF IP.
Attaching the files that may be needed to check:
ghrd_10as066n2.qsys
subsys_pcie.qsys
ghrd_10as066n2.sopcinfo
ghrd_10as066n2.dts
dts_error.txt // error message log of sopc2dts and dtc commands
Thanks,
--barny
11 Replies
- Ahmed_H_Intel1
Frequent Contributor
Hello, Are you following the rocket boards procedure to generate all files? Regards. - Ahmed_H_Intel1
Frequent Contributor
Please check this link: https://rocketboards.org/foswiki/Documentation/A10GSRDGeneratingTheLinuxDeviceTreeLTS - BChiw
New Contributor
Hello,
Thanks for the link. Yes, also followed the Rocketboards procedure.
Following the suggested link above gave the same results as before.
Please see screen output below.
Thanks,
--barny
> embedded_command_shell.sh
------------------------------------------------
Intel FPGA Embedded Command Shell
Version 17.1 [Build 590]
------------------------------------------------
> sopc2dts -i ghrd_10as066n2.sopcinfo -o ghrd_10as066n2.dts \
-b ghrd_10as066n2_board_info.xml \
-b hps_a10_common_board_info.xml \
-b hps_a10_devkit_board_info.xml \
--bridge-removal all --clocks
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
Component emif_0 of class altera_emif is unknown
Component emif_0_arch of class altera_emif_arch_nf is unknown
Component emif_0_ecc_core of class altera_emif_ecc is unknown
Component emif_0_col_if of class altera_ip_col_if is unknown
Component emif_0_col_if_colmaster of class alt_mem_if_jtag_master is unknown
Component emif_0_cal_slave_component of class altera_emif_cal_slave_nf is unknown
> dtc -I dts -O dtb -o socfpga_arria10_socdk_sdmmc.dtb ghrd_10as066n2.dts
ERROR (phandle_references): Reference to non-existent node or label "emif_0_arch"
ERROR: Input tree has errors, aborting (use -f to force output)
- BoonT_Intel
Frequent Contributor
Hi Sir,
For the design, it already consist of the DDR4 which is HPS DDR4. So, I believe the emif_0 that you added is the FPGA EMIF.
Is this FPGA EMIF will used by your HPS system? If it is not use, then you can just delete those component emif_0* from the DTS file.
- BChiw
New Contributor
Hello,
Thank you for the reply.
The project has two EMIFs:
HPS-EMIF 1GB: seen and used by Linux
FPGA-EMIF 2GB: not used by Linux, used by DMA engines for buffer.
- 2GB memory space needs to be allocated by Linux (Malloc(?)).
- h2f_axi_master (0xC000_0000) base address has < ~1GB range only to map
- Can use address spanner for SW checking of buffer states
Thanks,
- BoonT_Intel
Frequent Contributor
Hi Sir,
So emif_0 is the FPGA or HPS EMIF? If it is FPGA EMIF then you can just open the DTS in editor and delete the emif_0 line from there.
- BChiw
New Contributor
Hello,
Thank you for the reply. Yes, emif_0 is FPGA EMIF.
If emif_0 is deleted, how will Linux see the resource? How can Linux allocate the 2GB space?
Thanks,
- BoonT_Intel
Frequent Contributor
As you mentioned, the emif_0 is not used by linux and HPS system, so you can delete it from the DTS. - BChiw
New Contributor
Hello,
Sorry, need to correct my earlier statement.
HPS system will have access to FPGA EMIF. This is for the Linux drivers to allocate FPGA EMIF memory space for the DMA engines and to check the contents of the data buffer.
Main Linux OS will still run from HPS EMIF.
Thank you.
- BoonT_Intel
Frequent Contributor
looks like the system not recognize any driver for emif. But seem like you only need to access the FPGA EMIF from HPS as a flat memory, maybe you can try to modify the DTS to flat memory as below. See if you still can access the address from HPS.
// emif_0_ecc_core: unknown@0x100000040 {
// compatible = "unknown,unknown-16.1";
// reg = <0x00000001 0x00000040 0x40000000>;
// clocks = <&emif_0_arch 0>;
// }; //end unknown@0x100000040 (emif_0_ecc_core)
memory {
device_type = "memory";
reg = <0xc0000000 0x20000000>;
};