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BChiw
New Contributor
New ContributorIntel EMIF FPGA IP DTS / DTB error.
Hello, Need help for this DTS/DTB generation error. We are using this link as the base design: https://rocketboards.org/foswiki/Projects/A10AVCVPCIeRootPortWithMSI Then we added the FPGA DDR4 int...
BChiwNew Contributor
New ContributorHello,
Sorry, need to correct my earlier statement.
HPS system will have access to FPGA EMIF. This is for the Linux drivers to allocate FPGA EMIF memory space for the DMA engines and to check the contents of the data buffer.
Main Linux OS will still run from HPS EMIF.
Thank you.
