Forum Discussion

DaveMM's avatar
DaveMM
Icon for New Contributor rankNew Contributor
2 years ago

In-System Memory Content Editor

Intel Stratix 10 GX FPGA Development Kit L-Tile 1SG280LU2F50E2VG / 1SG280LU3F50E3VGS1 (User guide is not clear) I have configured a ROM to "Allow In-System Memory Content Editor to capture and upda...
Board Debug
Fpga Devkit
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
2 years ago

The obvious question is: is this how you initialized the ROM? Assuming the answer is no, then you have to look at how you're initializing the ROM: .mif, .hex, and are you using an IP and set the parameter to use the appropriate file or the ram_init_file synthesis attribute for an inferred ROM?

For your memory initialization file, can you open it in Quartus and confirm that the correct data is in that file?

DaveMM's avatar
DaveMM
Icon for New Contributor rankNew Contributor
2 years ago

The .mif file is correctly loaded. Once synthesized the contents are readable and have been verified.

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    2 years ago
    @DaveMM wrote:

    The .mif file is correctly loaded. Once synthesized the contents are readable and have been verified.

    So does that mean you've solved the issue? Or are you saying that the ISMCE is not matching what you are seeing in the functional design?

    • DaveMM's avatar
      DaveMM
      Icon for New Contributor rankNew Contributor
      2 years ago

      Sorry, I was not clear. The In-System Memory content editor does not work. Reading the memory from our design interface shows the correct memory content. Our system is working and running code from the ROM. We would like to use the In-System Memory content editor to allow our SW team to make modifications.