I am looking for a modulo n counter with a real reset in vhdl; thank you for your reply .

Hi ,

I will paste the sample counter program for your reference , make changes as per your requirement

library IEEE;

use IEEE.NUMERIC_STD.all;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity scale_clock is

port (

clk_50Mhz : in std_logic;

rst : in std_logic;

clk_2Hz : out std_logic

);

end scale_clock;

architecture Behavioral of scale_clock is

signal prescaler : unsigned(23 downto 0);

signal clk_2Hz_i : std_logic;

begin

gen_clk : process (clk_50Mhz, rst)

begin -- process gen_clk

if rst = '1' then

clk_2Hz_i <= '0';

prescaler <= (others => '0');

elsif rising_edge(clk_50Mhz) then -- rising clock edge

if prescaler = X"BEBC20" then -- 12 500 000 in hex

prescaler <= (others => '0');

clk_2Hz_i <= not clk_2Hz_i;

else

prescaler <= prescaler + "1";

end if;

end if;

end process gen_clk;

clk_2Hz <= clk_2Hz_i;

end Behavioral;

Hi Gilles,

With the above , I am closing the tread if you u have any other questions.

Regards,

Rahul S

Hi Gilles,

Thanks for the update , I am sorry to let you know , I am not familiar with french words. So I am assuming bibliotheque as library ( got from google).

If I am rewriting your question, is there any library to convert VHDL to Hexadecimal .

In my point of view the conversion of VHDL to binary or machine ( device ) depended is done by the tool which is provided from the Vendors .

Hi Rahul,

This is a decimal to hexadecimal to Vhdl converter for Quartus 14.1_Max 5

Best regards Gilles

Hi ,

In my knowledge there is not converter from Decimal to Hexadecimal to VHDL ( Decimal >> Hexadecimal >> VHDL)

Altera is not providing any tool for the conversion to decimal to VHDL