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Zarquin's avatar
Zarquin
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

How to test Avalon MM reference design on CV GT Dev Kit?

Dear Community,

Maybe I'm a bit overcautious, but but I'd better ask:

How can I test the Avalon MM reference design ep_g1x4.qsys for the 5CGTFD9EF35C7 on my Dev Kit? I have worked through this guide, did the pinning and synthesis was successful.

Where do we go from here? What is the best way to get the ep_g1x4.sof file onto the FPGA to run the Dev Kit as an EndPoint?

May I use the Board Update Portal Website?

Thank you and best regards

6 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    The most immediate way is to use the Quartus Programmer.

    • Zarquin's avatar
      Zarquin
      Icon for Occasional Contributor rankOccasional Contributor
      3 years ago

      Dear sstrell,

      I'm afraid that I'll overwrite the other flash areas with the Quartus programmer.

      As far as I understand, you should only write the user hardware 1 area on the dev kit so as not to overwrite the factory software.
      I thought the Update Portal Website automatically writes only to the user hardware 1 area(?)
      So what do I have to watch out for when I use the Quartus programmer?

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    .sof files don't write to the flash. You're writing to the device itself for testing. You're not touching the flash at all at this point.

    • Zarquin's avatar
      Zarquin
      Icon for Occasional Contributor rankOccasional Contributor
      3 years ago

      Hello sstrell,

      O.K., but that means that the FPGA must not be programmed until the card is in the PCIe slot if I want to use the dev board as an endpoint and it has to be reprogrammed every time I repower the system, right?

      On the other hand, I don't understand how the update portal manages to write an uploaded sof file into the flash?

      • sstrell's avatar
        sstrell
        Icon for Super Contributor rankSuper Contributor
        3 years ago

        Yes, .sof needs to be manually programmed each time. It's for testing purposes. Eventually, you would convert it to a .pof or other format to put in flash.

        I don't know enough about the BUP to answer the second question. Are you sure it write to the flash and doesn't just program the FPGA the same way the Quartus Programmer does?

  • AR_A_Intel's avatar
    AR_A_Intel
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Thanks for update answer sstrell!. We have not heard from you and hope the last note clears up this matter. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you