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Zarquin's avatar
Zarquin
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

How to test Avalon MM reference design on CV GT Dev Kit?

Dear Community, Maybe I'm a bit overcautious, but but I'd better ask: How can I test the Avalon MM reference design ep_g1x4.qsys for the 5CGTFD9EF35C7 on my Dev Kit? I have worked through this gu...
Zarquin's avatar
Zarquin
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Hello sstrell,

O.K., but that means that the FPGA must not be programmed until the card is in the PCIe slot if I want to use the dev board as an endpoint and it has to be reprogrammed every time I repower the system, right?

On the other hand, I don't understand how the update portal manages to write an uploaded sof file into the flash?

sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
3 years ago

Yes, .sof needs to be manually programmed each time. It's for testing purposes. Eventually, you would convert it to a .pof or other format to put in flash.

I don't know enough about the BUP to answer the second question. Are you sure it write to the flash and doesn't just program the FPGA the same way the Quartus Programmer does?