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pmarques's avatar
pmarques
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11 months ago

How to access PIO register through a bare-metal application running on Agilex-5 HPS ?

I'm trying to run a simple bare-metal application running on HPS in the Agilex-5 065B Premium DevKit.

So far I've successfully ran this bare-metal example: https://altera-fpga.github.io/rel-24.3.1/baremetal-embedded/agilex-5/e-series/premium/ug-baremetal-agx5e-premium/

Now I'm trying to read/write a PIO register (DIPSW, LEDs) connected to the HPS via Avalon Memory Mapped Pipeline Bridge (same as in the GHRD).

My question is what functions/libraries do I need to use to access these registers ? All the docs and examples that I found are either for the NIOS soft processor or for older platforms (Arria, Cyclone).

Thanks,

PM.

Fpga Devkit

4 Replies

    • pmarques's avatar
      pmarques
      Icon for New Contributor rankNew Contributor
      10 months ago

      Hi Tiwari,

      I was assuming that those functions were targeting the direct GPIO pins of the HPS_IO. Can you confirm that they also work with a PIO Intel FPGA IP connected to the HPS via Avalon Memory Mapped Pipeline Bridge ?

      Thanks,

      PM.

  • Jeet14's avatar
    Jeet14
    Icon for Frequent Contributor rankFrequent Contributor
    10 months ago

    Hi,


    Separate PIO functions are not yet released yet. I see only HPS side few peripheral APIs.

    Complete Baremetal sources for Agilex-5 are in development phase and will be release soon this year.


    Regards

    Tiwari


  • Jeet14's avatar
    Jeet14
    Icon for Frequent Contributor rankFrequent Contributor
    10 months ago

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