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Mikhail_a's avatar
Mikhail_a
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

FPGA to HPS bridge on Agilex 7

Hello I'm trying to read and write from and to HPS SDRAM on Agilex 7 board I have this configuration of fpga2hps interface: On the other side I have two msgdma ip cores for MM to Stream and...
Fpga Devkit
EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


Apologies for the late responds, in the doc I provided last time, it mentioned at the most bottom page, we do need to disable all bridges in U-boot if we have enabled them manually, before booting to the kernel, there is an issue with the RBO server currently, you may access it another time and confirm:

https://www.rocketboards.org/foswiki/Projects/SettingUpAndUsingBridgesOnAgilex


I guess that demonstrate the behavior you're seeing? Do you see any other issue if you manually disable the bridges, every time your enabled it in U-boot?