Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorData from FPGA to host
Hi,
I have a DE0-nano board and I compute data (only 4 bits generated at about 10MHz) and I'd like to communicate it to the host cpu through the USB-blaster so programs could read it. I've read this (http://www.alteraforum.com/forum/showthread.php?t=32354) and there's instructive information but it's a bit old and maybe there exist other ways. I thought about a FIFO that would be written by the FPGA then read by the host through the USB link. Is it possible? Have I to use a virtual JTAG component? Thanks for your help.85 Replies
Altera_Forum--- Quote Start --- But you didn't post any details on the error, just that you had one, so its a bit hard to help :) --- Quote End --- Yes I did but it wasn't posted. I had a flashing screen telling why but I didn't have time to read it. Anyway I try another way:
--- Quote Start --- If you're still having trouble, just email me directly (at my forum name). --- Quote End --- If you don't mind, I prefer to write on the forum so people can read. I often find solutions to my problems reading forums.sdram_test Writing to 256 SDRAM locations Error:invalid command name "get_service_paths" Error: while executing Error:"unknown_original get_service_paths master" Error: ("eval" body line 1) Error: invoked from within Error:"eval unknown_original $cmd $args" Error: (procedure "::unknown" line 7) Error: invoked from within Error:"get_service_paths master" Error: (procedure "jtag_open" line 9) Error: invoked from within Error:"jtag_open" Error: (procedure "jtag_write" line 7) Error: invoked from within Error:"jtag_write $addr $data" Error: ("uplevel" body line 4) Error: invoked from within Error:"uplevel 1 $cmd" Error: invoked from within Error:"for {set i 0} {$i < $len} {incr i} { Error: set addr Error: set data Error: jtag_write $addr $data Error: }" Error: (procedure "sdram_test" line 4) Error: invoked from within Error:"sdram_test"- Altera_Forum--- Quote Start --- If you don't mind, I prefer to write on the forum so people can read. I often find solutions to my problems reading forums. --- Quote End --- Great! The fact that you can an error like "get_service_paths" means you have run the Tcl script in the wrong shell. That script needs to be run from within SystemConsole. After downloading the design to the DE0-nano, under Quartus II 13.1, you need to select Tools->System Console->System Console, and then once that starts up, you can source the Tcl script that contains the System Console commands, and then the sdram_test will work correctly. Yes, it would be nice if all Tcl consoles were the same :) Cheers, Dave
- Altera_Forum--- Quote Start --- After downloading the design to the DE0-nano, under Quartus II 13.1, you need to select Tools->System Console->System Console, and then once that starts up, you can source the Tcl script that contains the System Console commands, and then the sdram_test will work correctly. --- Quote End --- When doing that, no other window/console opens.
- Altera_Forum--- Quote Start --- When doing that, no other window/console opens. --- Quote End --- Hmm, that's weird. From the Start Menu, start a NIOS II Command Shell (under the NIOS II EDS folder), and then type system-console in that shell. I just did that on my install and system console started. If it fails on your setup, then I think you have an installation issue. Cheers, Dave
- Altera_Forum
I get "Cannot load library: ***\jvm.dll".
I'll try to reinstal when I have time. - Altera_Forum--- Quote Start --- I get "Cannot load library: ***\jvm.dll". I'll try to reinstal when I have time. --- Quote End --- Ok, it sounds like you'll need to. Cheers, Dave
- Altera_Forum
I get the same error.
Maybe I should ask my administrator? - Altera_Forum
Thanks to this post: http://www.alteraforum.com/forum/showthread.php?t=43498 (http://www.alteraforum.com/forum/showthread.php?t=43498) everything is OK. Let's go on...
- Altera_Forum--- Quote Start --- Let's go on... --- Quote End --- Ok, glad to hear you managed to resolve that issue. Once you have the Qsys design synthesized, you can look at the System Console command script and see how it uses Tcl commands that are described in the Altera documentation. Read that documentation and try to understand the scripts. From that you should be able to see how data can be moved back-and-forth between the FPGA and the PC. Then you can figure out if it meets your needs, eg., the interface might be fast enough to continuously transfer data at the rate you need, or if its not, perhaps you can write a snapshot of data to SDRAM and then transfer that snapshot. Cheers, Dave
- Altera_Forum
I was able to run the tutorial entirely and I read the tcl files (I don't know tcl but it is pretty simple to understand) and I don't find all the commands that are used. For example it uses master_read_32 when reading the memory but I can't find what this command is doing.
Someone told me using an sdram was tricky. Is all the complexity hidden somewhere? Where? How? I think I will use it to store my data and then read it by the host. Is there an easy way to do that?
