Data from FPGA to host

I believe you want the JTAG UART core on the FPGA end and software from Altera that talks to the NIOS on the PC end.

http://www.altera.com/support/kdb/solutions/rd09142004_1190.html

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I have a DE0-nano board and I compute data (only 4 bits generated at about 10MHz) and I'd like to communicate it to the host cpu through the USB-blaster so programs could read it. I've read this and there's instructive information but it's a bit old and maybe there exist other ways.

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In addition to the JTAG UART, those are still the only ways you can transfer data :)

http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial

I haven't used the JTAG UART, but I think it suffers from the same problem the other interfaces do; no easy way to access the UART from user-provided software, eg., the JTAG UART does not show up as a COM port.

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I thought about a FIFO that would be written by the FPGA then read by the host through the USB link. Is it possible? Have I to use a virtual JTAG component?

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The problem is, that the USB interface is not a general purpose USB interface. Its a USB-Blaster and it is "owned" by Quartus and jtagd. You can access it using FTDI's D2XX DLLs directly, but I'm not sure whether that "plays nicely" if you also happen to be using Altera's tools at the same time. The Wiki tutorial contains code for accessing the JTAG-to-Avalon-MM bridge via Altera's tools, and that is pretty much the only safe way to access the board via JTAG.

It would be nice if Altera would publish their jtagd protocol, as then you'd be able to write sockets code to interact with jtagd, which would in turn interact with the JTAG interface on the FPGA (in a multi-process safe manner, since all communications is via jtagd).

You could just buy an FTDI C232H cable and communicate with the board via that method.

Cheers,

Dave

Thanks Dave.

I will carefully read everything...

What I wonder is if it's easy to pass data from the console to the host programs (other than Altera) or maybe I should run them in the console. Is it possible? How?

And as I don't care a communication from the host to the design (only from the design to the host), can't I use a simpler way of doing it?

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What I wonder is if it's easy to pass data from the console to the host programs (other than Altera)

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Altera do not provide a simple method for user-coded software to interface to their USB-Blaster components, i.e., what you would like is a shared library you could call into that would play nicely with simultaneous operation of SystemConsole, SignalTap II, and other Quartus software.

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or maybe I should run them in the console. Is it possible? How? And as I don't care a communication from the host to the design (only from the design to the host), can't I use a simpler way of doing it?

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The solutions I show in the tutorial above involve running a server in SystemConsole, and then using a TCP/IP connection from your custom code.

If you do not care about running Altera's software in parallel with your code, you can use the FTDI driver to access the USB-Blaster directly. Although that involves decoding Altera's custom (and undocumented) protocols.

Cheers,

Dave

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(only 4 bits generated at about 10MHz)

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For what it's worth, you might get to your end goal faster (cheaper) by using something like FTDI UM232H module if your DE0-nano header pins aren't already used up.

Configured for parallel FIFO operation, there should be ample throughput to sustain the 40Mbps you're generating.

http://www.ftdichip.com/support/documents/datasheets/modules/ds_um232h.pdf

http://www.digikey.com/product-detail/en/um232h/768-1103-nd/2614628

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... you might get to your end goal faster (cheaper) by using something like FTDI UM232H module if your DE0-nano header pins aren't already used up.

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Here are performance measurements ...

https://www.ovro.caltech.edu/~dwh/correlator/pdf/ftdi.pdf

Cheers,

Dave

Sorry I didn't answer rapidly: I was away then my computer had to be reinstalled by my company (quite long).

I'm not sure os the next step: I could buy a FTDI C232H cable or try and use the virtual JTAG component. I'm not very found of understanding software questions so the first one seems a better choice.

Could you explain what I would need to do in both cases?

Thx

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Could you explain what I would need to do in both cases?

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First you need to clearly define what it is you are trying to do. From that we can understand the data rate you need between the FPGA and your PC. That will determine which option is suitable for your application.

Cheers,

Dave

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I need to transfer some words (4 bits for now) at about 10MHz from the FPGA to the host so it can be treated by software application.

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Right, that is what you stated above, however that is a data rate of 40Mbps, which far exceeds the capabilities of the DE0-nano JTAG interface, or of any UART interface you connect to I/O pins. A faster parallel interface would likely be needed.

So, take a step back, and explain "what" it is you are trying to do. What is this 40Mbps data stream? Is it continuous, or are snapshots acceptable? Could it be processed or minimally pre-processed on the FPGA to reduce the data rate over the link?

Or, why use a DE0-nano, why not use a board in a PCIe slot, and use the PCIe bus bandwidth?

Cheers,

Dave