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qwitza's avatar
qwitza
Icon for Occasional Contributor rankOccasional Contributor
9 months ago

Cyclone 5 first boot linux crashes, howto debug?

Hello,

We have a design with a Cyclone V FPGA. Some boards only boot after a reset following power-on.

Problem:

The Debian Linux with U-Boot boots from the SD card, but after approximately 10 seconds, the system crashes and becomes unresponsive. The login prompt appears (on UART debug), but I cannot enter anything, and the network interface does not work.

How should I start troubleshooting?

There is a JTAG on the board, but I have never used it until now.

Any hints or links would be greatly appreciated.

Sorry, but I have no idea how to resolve this, or where to start with the troubleshooting.

38 Replies

  • qwitza's avatar
    qwitza
    Icon for Occasional Contributor rankOccasional Contributor

    Hello,

    i think we can not change to partial, because we have only the free version.

    i am right?

    greetings

  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi


    Any update on this case?

    Did you try out the suggestion in the previous comment?


    Regards

    Jingyang, Teh


  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi


    Could you change the rpd to partial?

    It would need to be partial as the full configuration could cause the HPS to reconfigured too.

    When the HPS is configured the linux running will alsoo crashes, I believe what is happening currently in your case.


    Regards

    Jingyang, Teh



    • qwitza's avatar
      qwitza
      Icon for Occasional Contributor rankOccasional Contributor

      Hello,

      i think we can not change to partial, because we have only the free version.

      i am right?

      greetings

  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi


    Do you have any follow up question from the previous comment?


    Regards

    Jingyang, Teh


    • qwitza's avatar
      qwitza
      Icon for Occasional Contributor rankOccasional Contributor

      Hello,
      we do not write the rpd partially it is a full flash.
      The kernel also offers this option.

  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi


    After checking, it seems this is not officially tested for the Cyclone5.


    However we could try to get it to work on your end.

    The problem could be you not setting the Cyclone5 to have partial reconfiguration?

    https://www.intel.com/content/www/us/en/docs/programmable/683694/current/dynamic-reconfiguration-25100.html


    The configuration during the linux should only be on the FPGA fabric and not reconfigure the HPS.

    You could not reconfigure the HPS when running in linux.


    Regards

    Jingyang, Teh


  • qwitza's avatar
    qwitza
    Icon for Occasional Contributor rankOccasional Contributor

    Hello,

    here is the source code, how we "upload" the fpga firmware.

    if(is_no_error())
    {
    	std::ofstream wpd("/sys/kernel/config/device-tree/overlays/device/path");
    	wpd << "socfpga_overlay.dtb"";
    	wpd.close();
    	if(wpd.fail())
    		return ERROR_WRITE_FAIL;
    }
  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi


    Is it possible to share how you flash the FPGA firmware?

    In normal case we do not suggest to flash the FPGA firmware after we boot into the linux console.


    Regards

    Jingyang, Teh


    • qwitza's avatar
      qwitza
      Icon for Occasional Contributor rankOccasional Contributor

      Hello,

      uboot and debian are booted every time.

      but after writing the fpga firmware debian crashes, no input or other possible hard crash

      9.697986] socfpga-dwmac ff702000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
      [ 9.706611] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
      Debian GNU/Linux 10 ttyS0
      login: [ 37.347805] fpga_manager fpga0: writing socfpga.rbf to Altera SOCFPGA FPGA Manager
      login: [ 1477.077961] socfpga-dwmac ff702000.ethernet eth0: Link is Down

      if i disable the fpga firmware flash, it seems that the system bootup every time. the fpga firmware is written via devicetree update.

      thanks for the help!

  • qwitza's avatar
    qwitza
    Icon for Occasional Contributor rankOccasional Contributor

    Hello,

    after some search, it seems that the linux system crashes after writing the fpga firmware.