Critical Warning (24567):The design is using an internal oscillator

Hi,

In the same design I added an F-Tile IP and at the fitter step i got this error:

Intel FPGA IP instantiated in the design require the DEVICE_INITIALIZATION_CLOCK 
option to be set to either OSC_CLK_1_25MHZ, OSC_CLK_1_100MHZ or OSC_CLK_1_125MHZ. This assignment is missing in the QSF file

The assignment was not present in the QSF:

set_global_assignment -name DEVICE_INITIALIZATION_CLOCK OSC_CLK_1_125MHZ

After adding it the fitter completed and the first warning in my original post:

Critical Warning (24567): The design is using an internal oscillator along with transceivers, EMIF, MIPI, and PHY Lite interfaces.

Is not present anymore.

Thanks