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Björne2's avatar
Björne2
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2 years ago
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Synthesizing the HDL that OpenCL aoc creates manually

I'm using the Intel FPGA SDK for OpenCL (aoc) to synthesize bitstreams. The tool creates a directory where it stores all generated HDL files. It think (I think) invokes Quartus to synthesize the desi...
High-level Design Tools
  • BoonBengT_Altera's avatar
    BoonBengT_Altera
    2 years ago

    Hi @Björne2,


    Noted on the situation, unfortunately there is no such build flow available for either OpenCL or within Quartus to do so.

    The current build flow for OpenCL are via creating the hardware configuration file through the aoc command.

    Desire build flow might be similar to other tools mention above.


    Note: Intel OpenCL are in the deprecated roadmap.


    Best Wishes

    BB


BoonBengT_Altera's avatar
BoonBengT_Altera
Icon for Moderator rankModerator
2 years ago

Hi @Björne2,


Thank you for posting in Intel community forum and hope all is well.

If I understand the asked correctly you are looking for something on custom IP compilation which will be integrated in quartus. For that OpenCL are not possible as the design complation are based on BSP.


Hence perhaps what you are looking for is more toward Intel HLS or Intel OneAPI IP Authoring.

You will be able to find more details of both mention tools in the link below:

- https://www.intel.com/content/www/us/en/docs/programmable/683680/23-4/pro-edition-getting-started-guide.html

- https://www.intel.com/content/www/us/en/docs/programmable/749869/22-4/getting-started-with-oneapi-ip-authoring-18311.html


Hope that clarify


Regards

BB