New Contributor
New ContributorDear Whitepeau,
Thank you for the resource, unfortunately, these BSPs are for the Agilex 7 I-Series and F-Series Dev Kits. I have an Agilex 7 M-Series Development Kit - HBM2e Edition (3x F-Tile & 1x R-Tile): https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agm039.html. Concretely, I purchased the one from Mouser.
Would any of these BSPs give me support to use all the resources of my Agilex 7 M-Series? If not, who can help me generate a BSP for this FPGA?
Regards,
Denisa
ContributorHello Denisa,
I am afraid that there is no BSP for the kit you have, I expect we chose not to build a BSP for it because it has no PCIe connector (although the product page mentions PCIe connectivity is possible with an expansion board). oneAPI FPGA acceleration assumes a PCIe card (e.g. on of the devkits listed on our landing page, or a partner board listed in this document on our landing page).
Instead of building a full oneAPI BSP, you can also use the oneAPI DPC++/C++ compiler to create IP that you can integrate using a platform designer system. We demonstrate this in the Platform Designer code sample, and the Nios V reference design. You can learn more about IP interface customization by studying the HLS Flow Interfaces code samples as well.
Manually integrating your IP with Platform Designer (or SystemVerilog/VHDL if you are so inclined) gives you the ability to accelerate the embedded HPS, so you are not tied to an x86-64 host CPU.
Did you engage with an Intel/Altera salesperson to get that board? If you are interested in accelerating an x86-64 host system, you should reach out to them and see if they can help you get ahold of a partner board so you can avoid building a BSP and manually integrating a system.
New ContributorDear Whitepau,
Thank you very much for the detailed response. For my research project, having a standalone, host-independent solution is desirable, so I would use the Platform Designer and Nios V reference design flow for a final solution deployment or demonstrator.
However, the deployment/programming flow seems very cumbersome for design space exploration and rapid prototyping. I am searching for a way to connect the Agilex 7 M-series Dev Kit by PCIe to a x86-64 host system featuring 2x Intel Xeon Gold 6416H and 4 PCIe 5.0 slots.
My FPGA has 2x MCIO connectors with PCIe 5 support. In theory, I should be able to connect FPGA with 2 MCIO cables to a MCIO-PCIe Gen5 adapter that is connected to the host. Is there a recommended set of MCIO cables and MCIO-PCIe adapters that have been tested and with Agilex 7 M-series dev kit? I found this MCIO-PCIe adapter together with two MCIO SFF-TA-1016 8i cables, but I could find no cross-reference to supported hosts and FPGA devices. Could you point me to someone who can help me with choosing the right components for the setup?
Assuming I manage to connect the Agilex 7 M-series Dev Kit by PCIe to a x86-64 host, can you point me to someone who can help building a oneAPI compatible BSP?
Thank you for your help,
Denisa
