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aaa9's avatar
aaa9
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2 years ago

Long latency during high-level synthesis

The latency is as high as 100 or more when the following simple arithmetic circuit is high level synthesized. (The Makefile does not seem to be attachable as is, so I attach it in txt format.) The r...
High-level Design Tools
BoonBengT_Altera's avatar
BoonBengT_Altera
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2 years ago

Hi @aaa9,


Thank you for posting in Intel community forum, hope all is well and apologies for the delayed in response.

Noted on the situation, we are in the middle of trying the example provided.


At the same time I would suggest to go through the example that comes with HLS.

The following example can be found in the path <quartus installation path>/hls\examples\tutorials\ac_datatypes.

Mention example above would be similar to your mention scenario.

Hope that clarify.


Best Wishes

BB