How to debug why OpenCL command queue stalled on Cyclone V SoC?

No, it's not on emulator. This issue occurs on an FPGA board: Terasic DE-10 Nano.

Any comment?

Thanks for this suggestion.

That document says I can use "aocl diagnose" to check the hardware.

In my case "aocl diagnose" passed without any problem, as I've mentioned in my original post.

Any other way I can test?

OK. In the attached vector_add.tgz you can find

1. the opencl kernel source: vector_add/device/vecor_add.cl
2. the host application source: vector_add/host/src/main.cpp

I got them as part of the OpenCL BSP of DE10-Nano from Terasic.

I guess its original source is the v17.1 Arm32 Linux package (.tar.gz) from:

https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/design-software/opencl/vector-addition.html

Please kindly understand that you won't duplicate this symptom on the official DE10-Nano OpenCL BSP from Terasic.

It only happens on the BSP I created.

Anyway, as I said in my original post, the symptom is: the host application will stop on the call to clWaitForEvents() (Line 361) in the second run of this host application.

My OpenCL BSP is based on this one: https://github.com/thinkoco/c5soc_opencl, which is originally modified from de10_nano_sharedonly from Terasic.

I modified the Quartus project, the u-boot spl, u-boot, kernel, etc to enable 1920*1080 HDMI output.

Yes, I know how to use SignalTap. Any signal/bus inside the circuit you could kindly suggest me to probe?

Actually I've contacted the author of c5soc_opencl for this issue, but he has no idea about how to debug this issue, even he had solved many of my issues before.

OK, I'll try to debug in the way you suggest.

Thanks for your kind help. I wish you a wonderful day!