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OChen25's avatar
OChen25
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7 years ago

How to debug why OpenCL command queue stalled on Cyclone V SoC?

On Terasic DE10-Nano I've created an OpenCL BSP based on one originally modified from de10_nano_sharedonly. It works fine for programs like hello_world, 'aocl diagnose'. However, for vector_add, it r...
KennyT_altera's avatar
KennyT_altera
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7 years ago
To enable signal tap debug, you can follow https://www.intel.com/content/www/us/en/programmable/support/support-resources/support-centers/opencl-bsp-support.html -> 4 debug -> signal tap debug Make sure your timing is closed in your design, you can refer to https://www.intel.com/content/www/us/en/programmable/support/support-resources/support-centers/opencl-bsp-support.html -> 2. floor planing and timing closure Since the design is coming from them, can you post this question to them on the signal to probe https://github.com/thinkoco/c5soc_opencl/issues.
OChen25's avatar
OChen25
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7 years ago

Actually I've contacted the author of c5soc_opencl for this issue, but he has no idea about how to debug this issue, even he had solved many of my issues before.

OK, I'll try to debug in the way you suggest.

Thanks for your kind help. I wish you a wonderful day!