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ymiler's avatar
ymiler
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1 year ago

HBM - high band memory

Hi, I tried to generate an HBM memory example module when my device is Stratix 10. I have two projects: One where the HBM is located at the top, and another where the HBM is located at the botto...
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ymiler's avatar
ymiler
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1 year ago

want to add to my previous post :

your archive project works fine and compile successfully in my workspace ,

but when I try to create from scratch example design ( HBM location -top ) still I get error

ymiler's avatar
ymiler
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1 year ago

Hi

good news!!

I found the root cause of the error :

Error(175001): The Fitter cannot place 1 UFIND4H_UIB, which is within High Bandwidth Memory (HBM2) Interface Intel FPGA IP ed_synth_hbm_0_example_design_altera_hbm_1961_g23n22y

It was my set_location_assignment pin clock to PIN_AR26 - when remove it the Quartus succeed to finish the Plan stage successfully

But , Why ? this is legal pin ?

In addition , when the HBM is located at the bottom there is no issue even the assignment of the PIN_AR26

Are there more problematic pins when the HBM locate at the top ?

  • ymiler's avatar
    ymiler
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    1 year ago

    Hi

    I found the issue

    the solution is here :

    Place this reference clock input on the UIB_PLL_REF_CLK_00 pins while using the HBM2 device on the bottom of the FPGA, or the UIB_PLL_REF_CLK_01 pins while using the HBM2 on the top of the FPGA.

    when I locate the right pin it works