[FPGA USM]Issue in implementing zero-copy data transfer

Hi @giulio2,

Thanks for the explanation, yes design example of data transfer should be compliable.

As I do not have visibilities on how the implementation of data streaming and unroll are being done in the design example mention.

Here are some few resources that you can refer to for the mention topic:

- https://www.intel.com/content/www/us/en/develop/documentation/oneapi-fpga-optimization-guide/top/optimize-your-design/throughput-1/host/simple-host-device-streaming.html (streaming)

- https://www.intel.com/content/www/us/en/develop/documentation/oneapi-fpga-optimization-guide/top/flags-attr-prag-ext/loop-directives/unroll-pragma.html (loop unrolling)

To further clarify, may I know where did you get the hash_join_fpga.hpp refences from?

Cheers, looking forward to hear from you.

Best Wishes

BB