- 4 years ago156Views0likes0Comments
Why does the rx_freqlocked signal get stuck high for an Rx only transceiver instances in Cyclone® IV GX devices?
4 years ago128Views0likes0CommentsWhy does the Quartus II software version 15.0 web edition installer issue an error when trying to add a device?
4 years ago157Views0likes0Comments- 4 years ago136Views0likes0Comments
Is there a known issue with the Parallel Flash Loader (PFL) in the Quartus II software version 12.1?
4 years ago147Views0likes0CommentsWhat are the specs for the "ears" or the squared corners of the ground slug for a 144-Pin EQFP package?
4 years ago131Views0likes0CommentsHow do I calculate the frequency, phase shift and duty cycle for clocking ALTLVDS soft SERDES using external PLL mode?
4 years ago186Views0likes0CommentsEmbedded Peripherals IP User Guide - Altera® FPGA MII to RMII Converter Core - Table 461. The Parameter Scenario is incorrect
2 years ago131Views0likes0Comments- 1 year ago148Views0likes0Comments