Most Recentissue with IOPLL in quartus prime 18.0MAX10 programming and verification very slowMax10: internal reference voltage to output pin?I'm trying to find a forum where I can ask questions about electronic schematics.Connection of pll_ref_clk in an Arria10 with one JESD204b receiverMAX10 JTAGEN connectionsA10 AVMM DMA has only a single MSI to Host, how to distinguish this DMA completion is from READ DMA controller, or from WRITE DMA controller?I'm looking for the replacement part for this FPGA, Part number# EPM3032ATC44-10.State machine crashes (Cyclone II) - no idea why. How do I debug?I need to generate a stream of serial binary data in any FPGA with a very high frequency. And then, I need to save it in a memory.
