Most Recentreport shows no DSP usage for OpenCL kerneloneAPI Base Toolkit-Error: Compiler Error: OpenCL kernel compile/link FAILEDDisable Hyperflex Optimization in OpenCL Compiler v18.1.2aocl diagnose is not workingMax10を使用した回路を設計中です、10M02SCU169C8Gと10M04SCU169C8Gを同じ基板で使い分けたいと思っています 10M02SCU169C8GのD2,E2ピンのNCピンにGND、D3のNCピンにVCCA3に接続しても問題ないでしょうか、それとも接続ON/OFF用の切り替えが必要でしょうか、知っている方、動作させたことのある方 の回答お願いします。Trying to compile streaming dma afu for Stratix10 (simulation ) and getting this error (picture) Tried adding the ccip_if_pkg.sv file into vlog_file list, but didn't work. Any suggestions? Thank youAltera PLL (cycloneV) getting locked to the wrong frequency.Eviction policy of burst-coalesced cached non-aligned LSU's cacheRTL opencl Run time errorsFacing Partial reconfiguration error, "Error(18853): Running Synthesis on a partial reconfiguration design at the implementation revision is illegal."
