ContributionsMost RecentMost LikesSolutionsRe: Global clock control assignment for Arria10 Thank You Nurina, That works great! Note: I couldn't respond before because I changed my smartphone and the old one was at home, which is the only one that receives the authentication code. How to move the Microsoft authentication to my new smartphone? Kind Regards, Alex. Re: Global clock control assignment for Arria10 I already use the global_signal to use the global clock routing. This is on top of that, for the clk control selection that connects the node to the global switch. Re: Global clock control assignment for Arria10 To force Quartus to use a global clk control close to the area where it is critical. I used it in many FPGA's and projects to get better or consistent timings over runs. Re: Global clock control assignment for Arria10 Pictures showing the results with not supported GLOBAL_SIGNAL_CLKCTRL_LOCATION and the one with attempt using location, not taken into account. Global clock control assignment for Arria10 Hello, I want to set the global clock control location for the arria 10 FPGA, In the past I used the GLOBAL_SIGNAL_CLKCTRL_LOCATION https://www.intel.com/content/www/us/en/docs/programmable/683084/current/global-signal-clkctrl-location.html But it is not supported for the Arria 10. I tried to used the location assignment instead, set_location_assignment CLKCTRL_2A_G_I28 -to rfd_ic_i|u_top|u_core|u_rfd_clockshop|i_mcu_cgu|i_final_stag0_clockgate|i01_cnhlspd|Q_cZ it shows a green check mark in the edits assigns windows but it is not taken into account (see picture). What can I use to force the global signal location for the Arria 10? Thanks. Alex. Re: Quartus 23.1 pro: --dni does not support preserve runs (synthesized or final) ok clear. Re: Quartus 23.1 pro .qsf error on ANALYZE_LATCHES_AS_SYNCHRONOUS_ELEMENTS Thank You Seng, That means that old default option ON is always the case now, only latch sync analysis is done (not async anymore). Have a nice day. Alex. Re: Preservation level: Final leads to Quartus crash on re-run I don't have a small project and I don't have time to create one. I can confirm that the ini file is used, I see this message in the Quartus processing windows: Info: Using INI file rfd_fpga/stratix10_wrapper/synplify_synth_quartus_fit/quartus.ini Re: .ip/.qip PLL how to disable sdc generation? ok. Quartus 23.1 pro: --dni does not support preserve runs (synthesized or final) Quartus 23.1 pro: --dni does not support preserve runs (synthesized or final), timing analyzer. Is it planned to add the support?