Denisa
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Re: PCIe 4.0 Example for Agilex 7 M-Series
Dear Wincent_Altera, Thank you very much for the pointers! After reviewing the documentation, I see that the provided example uses the FPGA as a root point. For my setup, I have a host server from which I want to connect to the FPGA board as an end point through PCIe. Is there an example of a design for this use case? The host is a Lenovo workstation featuring 2x Intel Xeon Gold 6416H 4 PCIe 5.0 slots. I purchased this MCIO-PCIe adapter with two MCIO SFF-TA-1016 8i cables to connect the FPGA board to the host. So far, I cannot list the FPGA PCIe device from the host using the lspci command. The host server has installed Rocky Linux 9.5 and Quartus 24.3. Is it necessary to run Ubuntu 20.04? Thanks, DenisaPCIe 4.0 Example for Agilex 7 M-Series
Hello, We purchased this Agilex 7 M-Series Dev Kit (https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agm039.html) for a project, and we're having trouble locating the design example for PCIe mentioned in the documentation. We could, however, identify an example in the documentation of the I-Series board, but the pin mapping is not straightforward. Could you please provide an example or documentation on configuring a basic design using the PCIe for the Agilex™ 7 FPGA M-Series Development Kit—HBM2e Edition (3x F-Tile & 1x R-Tile)? Also, is there any chance a BSP will be released for this dev kit? Thanks, DenisaRe: MCIO to PCIe Host Adapter for Agilex 7 M-series Dev Kit
Hi Jzone315, We tried the mcio-PCIe adapter but could not make the FPGA PCIe device visible from the host side. Unfortunately, Intel/Altera does not provide a PCIe design example for the Agile 7-M series, so we adapted the one available for the I series. Said this, I am not sure if the problem is the cables, the adaptor or the PCIe IP design. Dear Altera/Intel Support, According to the documentation ( https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agm039.html), a PCIe 4.0 Design example is provided, but I could not possibly locate it. Is there any chance there will be a reference design for using the PCIe on the Agile 7-M series dev kit? If not, is this still the official channel to get post-purchase support to help Altera FPGA users get the basics working? Thanks, DenisaRe: oneAPI Board Support Package for Agilex 7 M-Series FPGA
Hello, Thank you for your replies. Do you think that the setup I envision is impossible? Should I consider returning the board or asking for a replacement with an Agilex I series dev kit? The setup will be used in research, and we will spend most of the time doing prototyping of many different HPC kernels that will stream compute at the max data transfer rate we can get (up to 1TB/s). The final deployment on a standalone FPGA board only serves as a demonstrator for an energy efficient solution that does not require keeping a server like host idle most of the time. It is important for to have a PCIe connection setup for prototyping and validating the FPGA accelerators with a host execution and to having an oneAPI BSP seems (at least in theory) the way to approach this. Assuming this is not a dead end: I will have a look at the OSF guide for the Agilex 7 I series del kit, as it seems the most similar standalone fpga to the Agilex 7 M series. I will still need advice about how to connect FPGA to the host though PCIe. Regarding the thread about the MCIO cables (https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/MCIO-to-PCIe-Host-Adapter-for-Agilex-7-M-series-Dev-Kit/m-p/1634702#M28126), it only answered half of the question, about the MCIO Amphenol cable P/N: HMC74-1492, that are likely to work with the Agilex 7 M-series for PCIe5 because it was tested with an I-series. Do you have any suggestion for the adapter MCIO-PCIe adapter? Thank you, DenisaRe: oneAPI Board Support Package for Agilex 7 M-Series FPGA
Dear Whitepau, Thank you very much for the detailed response. For my research project, having a standalone, host-independent solution is desirable, so I would use the Platform Designer and Nios V reference design flow for a final solution deployment or demonstrator. However, the deployment/programming flow seems very cumbersome for design space exploration and rapid prototyping. I am searching for a way to connect the Agilex 7 M-series Dev Kit by PCIe to a x86-64 host system featuring 2x Intel Xeon Gold 6416H and 4 PCIe 5.0 slots. My FPGA has 2x MCIO connectors with PCIe 5 support. In theory, I should be able to connect FPGA with 2 MCIO cables to a MCIO-PCIe Gen5 adapter that is connected to the host. Is there a recommended set of MCIO cables and MCIO-PCIe adapters that have been tested and with Agilex 7 M-series dev kit? I found this MCIO-PCIe adapter together with two MCIO SFF-TA-1016 8i cables, but I could find no cross-reference to supported hosts and FPGA devices. Could you point me to someone who can help me with choosing the right components for the setup? Assuming I manage to connect the Agilex 7 M-series Dev Kit by PCIe to a x86-64 host, can you point me to someone who can help building a oneAPI compatible BSP? Thank you for your help, DenisaRe: oneAPI Board Support Package for Agilex 7 M-Series FPGA
Dear Whitepeau, Thank you for the resource, unfortunately, these BSPs are for the Agilex 7 I-Series and F-Series Dev Kits. I have an Agilex 7 M-Series Development Kit - HBM2e Edition (3x F-Tile & 1x R-Tile): https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agm039.html. Concretely, I purchased the one from Mouser. Would any of these BSPs give me support to use all the resources of my Agilex 7 M-Series? If not, who can help me generate a BSP for this FPGA? Regards, DenisaoneAPI Board Support Package for Agilex 7 M-Series FPGA
Hello, I have recently purchased an Intel Agilex 7 M-series FPGA for a university research project the Embedded Systems Lab (EPFL, Switzerland) and I am seeking technical support to program with it oneAPI DPC++/C++. I don't have any experience building a Board Support Package (BSP). Is there a recipe or prebuild BSP for this FPGA to program it with oneAPI? Upon receiving the board, I performed basic tests using the Board Test System (BTS) to verify its overall functionality. However, I am unable to use some of the more advanced features of the board, which are the primary reasons for our purchase. Any help on how to use HBM2e and CXL capabilities with the oneAPI workflow would be much appreciated. Thanks! DenisaMCIO to PCIe Host Adapter for Agilex 7 M-series Dev Kit
Hello, I need help to choose the right MCIO cables and MCIO-PCIe Gen5 adapter to connect an Agilex 7 M-series dev kit to a host over CXL (Compute Express Link). The host is a Lenovo workstation featuring 2x Intel Xeon Gold 6416H (2x18-core, 45MB Cache, up to 4.20GHz) and 4 PCIe 5.0 slots. Is there a recommended set of MCIO cables and MCIO-PCIe adapters that have been tested and with Agilex 7 M-series dev kit? In theory, I should be able to use this MCIO-PCIe adapter together with two MCIO SFF-TA-1016 8i cables, but could find no cross reference to supported hosts and FPGA devices. Thank you for your help, Denisa Constantinescu
